Qus : 1 MCA NIMCET PYQ 2019 3 If we can generate a maximum of 4 Boolean functions using n Boolean variables, what will be minimum value of n?
NIMCET PREVIOUS YEAR QUESTION
1 65536 2 16 3 1 4 4 Go to Discussion MCA NIMCET Computer PYQ MCA NIMCET Boolean algebra PYQ Solution
Question:
If we can generate a maximum of 4 Boolean functions using n Boolean variables, what is the minimum value of n?
Formula: Number of Boolean functions of n variables is:
2 2 n
Condition: We are told the total functions must be ≤ 4:
2 2 n ≤ 4
✅ Try values of n :
n = 0 : 2 2 0 = 2 1 = 2 ✅
n = 1 : 2 2 1 = 2 2 = 4 ✅
n = 2 : 2 2 2 = 2 4 = 16 ❌
Minimum n for which number of Boolean functions ≤ 4 is:
1
✅ Final Answer: 1
Qus : 2 MCA NIMCET PYQ 2021 2 The Process when processor fetch or decode another instruction during the execution of current instruction is called
1 Super computing 2 Pipelining 3 Cloud Computing 4 Accumulators Go to Discussion MCA NIMCET Previous Year PYQ MCA NIMCET NIMCET 2021 PYQ Solution
✅ Concept:
In modern processors, to improve performance, the CPU often overlaps the fetch, decode, and execute stages of multiple instructions. This overlapping is known as:
Instruction Pipelining
✅ Example:
Instruction 1: Being executed
Instruction 2: Being decoded
Instruction 3: Being fetched
This overlapping allows multiple instructions to be processed simultaneously at different stages of the pipeline, improving throughput.
✅ Final Answer: Instruction Pipelining
Qus : 3 MCA NIMCET PYQ 2021 4 Which of the following is used by ALU to store the intermediate results?
1 Stack 2 Heap 3 Registers 4 Accumulators Go to Discussion MCA NIMCET Previous Year PYQ MCA NIMCET NIMCET 2021 PYQ Solution
✅ Concept:
The Accumulator is a special-purpose register used by the ALU to store intermediate results during arithmetic and logic operations.
✅ Explanation:
It simplifies CPU design by reducing the number of memory accesses.
Results of one operation are stored in the accumulator and used in the next.
Widely used in simple or older CPU architectures.
✅ Final Answer: Accumulator
Qus : 4 MCA NIMCET PYQ 2021 4 One TeraByte(TB)=_________GB and One ExaByte(EB)=_______GB
1 2 10 G B , 2 16 G B 2 2 10 G B , 2 20 G B 3 2 10 G B , 2 24 G B 4 2 10 G B , 2 30 G B Go to Discussion MCA NIMCET Previous Year PYQ MCA NIMCET NIMCET 2021 PYQ Solution
✅ Conversion (Using Powers of 2):
1 Terabyte (TB) = 2 10 Gigabytes (GB)
1 Exabyte (EB) = 2 10 Petabytes (PB)
1 Petabyte (PB) = 2 10 Terabytes (TB)
Therefore, 1 Exabyte (EB) = 2 10 × 2 10 × 2 10 = 2 30 Gigabytes (GB)
✅ Final Answer:
1 Terabyte (TB) = 2 10 GB
1 Exabyte (EB) = 2 30 GB
Unit Shortened Capacity Bit b 1 or 0 (on or off) Byte B 8 bits Kilobyte KB 1024 bytes Megabyte MB 1024 kilobytes Gigabyte GB 1024 megabytes Terabyte TB 1024 gigabytes Petabyte PB 1024 terabytes Exabyte EB 1024 petabytes Zettabyte ZB 1024 exabytes Yottabyte YB 1024 zettabytes
Qus : 5 MCA NIMCET PYQ 2021 2 The Cache Memory is more effective because of
1 Memory localization 2 Locality of reference 3 Memory Size 4 None of the mentioned Go to Discussion MCA NIMCET Previous Year PYQ MCA NIMCET NIMCET 2021 PYQ Solution
✅ Concept:
Cache memory is highly effective due to its ability to take advantage of the locality of reference . This refers to the tendency of programs to access a relatively small portion of memory repeatedly during execution.
✅ Explanation of Options:
Memory Localization: Not the correct answer, as it's a general concept related to memory organization.
Locality of Reference: The correct answer! This refers to the tendency of a program to repeatedly access the same memory locations, which cache memory leverages to speed up data access.
Memory Size: Cache memory is small, and its size is actually one of the factors that makes it faster, but size alone does not determine its effectiveness.
None of the Mentioned: This option is incorrect because "locality of reference" is the main reason cache memory is effective.
✅ Final Answer:
The most effective reason for cache memory is the Locality of Reference .
Qus : 6 MCA NIMCET PYQ 2021 1 Which of the following is the fastest means of memory access for CPU?
1 Registers 2 Cache 3 Main Memory 4 Stack Go to Discussion MCA NIMCET Previous Year PYQ MCA NIMCET NIMCET 2021 PYQ Solution
✅ Concept:
The fastest means of memory access for the CPU refers to the storage that allows the quickest retrieval of data. This is crucial for efficient processing and performance.
✅ Explanation of Options:
Registers: Registers are the fastest form of memory access because they are directly in the CPU. However, they are very small and not used for regular memory storage.
Cache: Cache memory is the most effective and frequently used type of memory, as it stores frequently accessed data for fast retrieval. It is still slower than registers but much faster than main memory.
Main Memory: Main memory (RAM) is slower than both cache and registers, but it provides larger storage for currently active processes.
Stack: The stack is used for storing function calls and local variables. While it is quick, it still doesn't surpass cache memory in terms of speed.
✅ Final Answer:
The fastest means of memory access for the CPU is Registers .
Qus : 7 MCA NIMCET PYQ 2021 3 The number (2217)8 is equivalent to
1 (608)16 2 (028F)16 3 (048F)16 4 (2297)16 Go to Discussion MCA NIMCET Previous Year PYQ MCA NIMCET NIMCET 2021 PYQ Solution
✅ Step 1: Convert Octal to Binary
Each octal digit is represented by 3 binary digits. Let's convert (2217)8 to binary:
28 = 010 , 28 = 010 , 18 = 001 , 78 = 111
Binary Representation: 010 010 001 111
✅ Step 2: Group Binary in 4-bit Sections
To convert binary to hexadecimal, group the binary digits in sets of 4, starting from the right:
010 010 001 111 becomes 0010 0100 0111
✅ Step 3: Convert Binary to Hexadecimal
Now convert each group of 4 bits into its hexadecimal equivalent:
0010
= 2
0100
= 4
0111
= 7
✅ Final Answer:
The hexadecimal equivalent of (2217)8 is: (247)16
Qus : 8 MCA NIMCET PYQ 2021 1 To fetch data from secondary memory which one of the following register is used
1 MAR 2 PC 3 IR 4 MBR Go to Discussion MCA NIMCET Previous Year PYQ MCA NIMCET NIMCET 2021 PYQ Solution
✅ Concept:
To fetch data from secondary memory, certain registers are used to handle the addresses and manage the data flow between secondary memory and the CPU.
✅ Explanation of Options:
Program Counter (PC): The Program Counter holds the address of the next instruction to execute, not used for fetching data from secondary memory.
Memory Address Register (MAR): This is the correct answer! The MAR holds the address in memory from which data will be fetched or written, including from secondary storage. It is responsible for managing the memory access.
Memory Buffer Register (MBR): The MBR temporarily holds data being transferred to or from memory but does not directly fetch data from secondary memory.
Accumulator: The Accumulator holds intermediate results of arithmetic or logical operations, not used for fetching data from secondary memory.
✅ Final Answer:
The register used to fetch data from secondary memory is the Memory Address Register (MAR) .
Qus : 9 MCA NIMCET PYQ 2021 2 The binary multiplication 00*11 will give
1 11 2 00 3 01 4 10 Go to Discussion MCA NIMCET Previous Year PYQ MCA NIMCET NIMCET 2021 PYQ Solution
✅ Concept:
Binary multiplication is done similarly to decimal multiplication, where each bit is multiplied individually. Let's break down 00 2 × 11 2 step by step.
✅ Step 1: Understanding Binary Multiplication
We multiply each digit in the first binary number by each digit in the second binary number. The multiplication follows the same rules as decimal multiplication but with only 0's and 1's.
✅ Step 2: Perform the Multiplication
Let's multiply the two binary numbers:
First step: 0 × 1 = 0
Second step: 0 × 1 = 0
Third step: 0 × 1 = 0
✅ Step 3: Adding the Results
Since all the results are 0, the final multiplication result is also 0.
✅ Final Answer:
The result of 00 2 × 11 2 is: 0
Qus : 10 MCA NIMCET PYQ 2021 4 Consider a computer system with speed of 106 instructions per second. A program P, having 2n2 steps is run on this system, where n is the input size. If n = 10000, what is the execution time for P?
1 1.2 seconds 2 20 seconds 3 100 seconds 4 200 seconds Go to Discussion MCA NIMCET Previous Year PYQ MCA NIMCET NIMCET 2021 PYQ Solution Speed of computer = 10 6 per second For n = 10000 = 10 4
T i m e = No of tasks Speed of computer
T i m e = 2 n 2 10 6
= 2 × ( 10 4 ) 2 10 6
= 2 × 10 8 10 6
= 2 × 10 2
= 200 s e c
Qus : 11 MCA NIMCET PYQ 2021 1 To access the I/O devices the status flags is continuously checked in
1 Program controlled I/O 2 Memory mapped I/O 3 I/O Mapped 4 None of the above Go to Discussion MCA NIMCET Previous Year PYQ MCA NIMCET NIMCET 2021 PYQ Solution Programmed I/O: In program-controlled I/O, the processor program controls the complete data transfer. So only when an I/O transfer instruction is executed, the transfer could take place. It is required to check that device is ready/not for the data transfer in most cases. Usually, the transfer is to & from a CPU register & peripheral. Here, CPU constantly monitors the peripheral. Here, until the I/O unit indicates that it is ready for transfer, the CPU wait & stays in a loop. It is time-consuming as it keeps the CPU busy needlessly.
Qus : 13 MCA NIMCET PYQ 2017 1 The representation of a floating point binary number +1001.11 in 8 bit fraction and 6 bit exponent format is
1 Fraction : 01001110Exponent : 000100
2 Fraction : 00001001Exponent : 000011
3 Fraction : 10010000Exponent : 110000
4 Fraction : 00100100Exponent : 011000
Go to Discussion MCA NIMCET Previous Year PYQ MCA NIMCET NIMCET 2017 PYQ Solution
✅ Given:
The floating-point binary number is + 1001.11 2 .
We need to convert it into an 8-bit fraction and a 6-bit exponent format.
✅ Step 1: Normalize the Binary Number
We start by normalizing the binary number into scientific notation of the form:
1. x x x x × 2 n
Converting 1001.11 2 into scientific notation gives:
1001.11 2 = 1.00111 2 × 2 3
The exponent is 3 (because the binary point is shifted 3 places to the left).
✅ Step 2: Convert the Exponent to Binary
The exponent is 3 in decimal. To represent this in binary using 6 bits, we get:
Exponent = 000100 2
✅ Step 3: Convert the Fraction to 8 Bits
The fractional part of the normalized binary number is 00111 . We need to extend it to 8 bits:
Fraction = 01001110 2
✅ Final Answer:
The floating-point binary number + 1001.11 2 in 8-bit fraction and 6-bit exponent format is:
Exponent: 000100 2 , Fraction: 01001110 2
Qus : 15 MCA NIMCET PYQ 2017 4 Let the memory access time is 10 miliseconds and cache hit ratio 15%. The effective memory access time is
1 2 miliseconds 2 1.5 miliseconds 3 18.5 microseconds 4 18.5 miliseconds Go to Discussion MCA NIMCET Previous Year PYQ MCA NIMCET NIMCET 2017 PYQ Solution
✅ Given Values:
Memory Access Time: 10 milliseconds
Cache Hit Ratio: 15% = 0.15
✅ Formula for Effective Memory Access Time (EMAT):
EMAT = Cache Hit Ratio × Cache Access Time + ( 1 − Cache Hit Ratio ) × ( Memory Access Time + Cache Access Time )
✅ Step 1: Plug Values into the Formula:
EMAT = 0.15 × 10 + ( 1 − 0.15 ) × ( 10 + 10 )
EMAT = 0.15 × 10 + 0.85 × 20
EMAT = 1.5 + 17
EMAT = 18.5 milliseconds
✅ Final Answer:
EMAT = 18.5 milliseconds
Qus : 19 MCA NIMCET PYQ 2017 2 The smallest integer that can be represented by an 8 bit number in 2's complement form is
1 -256 2 -128 3 -127 4 -255 Go to Discussion MCA NIMCET Previous Year PYQ MCA NIMCET NIMCET 2017 PYQ Solution
✅ Given Information:
An 8-bit number in 2's complement form can represent values from − 2 n − 1 to 2 n − 1 − 1 .
✅ Step 1: Calculate the smallest integer:
Smallest value = − 2 8 − 1 = − 2 7 = − 128
✅ Final Answer:
The smallest integer that can be represented by an 8-bit number in 2's complement form is: -128
Qus : 20 MCA NIMCET PYQ 2017 4 Which of the following in a functionally complete set of gates?
I. NAND II. NOR
1 I but not II 2 II but not I 3 Neither I nor II 4 Both I and II Go to Discussion MCA NIMCET Previous Year PYQ MCA NIMCET NIMCET 2017 PYQ Solution
✅ Given Gates:
✅ NAND Gate:
The NAND gate is functionally complete. It can be used to construct any logic gate (AND, OR, NOT, etc.) by combining multiple NAND gates.
✅ NOR Gate:
The NOR gate is also functionally complete. It can be used to construct any logic gate (AND, OR, NOT, etc.) by combining NOR gates.
✅ Final Answer:
Both NAND and NOR gates are functionally complete.
Qus : 21 MCA NIMCET PYQ 2017 4 The total number binary function that can be defined using n Boolean variables is
1 2n-1 2 2n 3 2n+1 4 None of these Go to Discussion MCA NIMCET Previous Year PYQ MCA NIMCET NIMCET 2017 PYQ Solution
✅ Given Information:
We are asked to find the total number of binary functions that can be defined using n Boolean variables .
✅ Step 1: Number of input combinations:
For n Boolean variables , the number of possible input combinations is 2n .
✅ Step 2: Number of possible outputs:
Each input combination can map to either 0 or 1 , so there are 2 possible outputs for each of the 2n input combinations.
✅ Final Formula:
Total Binary Functions = 2(2n )
✅ Final Answer:
The total number of binary functions that can be defined using n Boolean variables is: 2(2n )
Qus : 23 MCA NIMCET PYQ 2020 1 The memory unit which directly communicates with
the CPU is known as
1 Primary Memory 2 Secondary Memory 3 Shared Memory 4 Auxiliary Memory Go to Discussion MCA NIMCET Previous Year PYQ MCA NIMCET NIMCET 2020 PYQ Solution
✅ Memory Unit Communication with CPU:
The memory unit which directly communicates with the CPU is known as:
✅ Primary Memory:
Primary memory, also called Main Memory , includes components like RAM (Random Access Memory) and Cache Memory .
✅ Why Primary Memory?
Primary memory is directly accessible by the CPU, allowing it to fetch data and instructions quickly for processing.
✅ Final Answer:
The memory unit that directly communicates with the CPU is: Primary Memory or Main Memory
Qus : 32 MCA NIMCET PYQ 2023 1
The maximum and minimum value represented in signed 16-bit 2s compliment representation are
1
-32768 and 32767
2
0 and 32767
3
0 and 65535
4
-16384 and 16383
Go to Discussion MCA NIMCET Previous Year PYQ MCA NIMCET NIMCET 2023 PYQ Solution
Maximum & Minimum in 16-bit 2's Complement
Total Bits: 16
Format: 1 sign bit + 15 magnitude bits
Maximum (positive):
0111 1111 1111 1111(2)
=
+32,767
Minimum (negative):
1000 0000 0000 0000(2)
=
−32,768
✅ Final Answer:
Minimum = −32,768
Maximum = +32,767
Qus : 35 MCA NIMCET PYQ 2023 2
Consider the following minterm for F:F(P, Q, R, S) = Σ0, 2, 5, 7, 8, 10, 13, 15. The minterms 2, 7, 8, and 13 are don't care terms. The minimal sum of products form for F is
1 ¯ Q S + Q ¯ S 2 ¯ Q ¯ S + Q S 3 ¯ Q ¯ R ¯ S + ¯ Q R ¯ S + Q ¯ R S + Q R S 4 ¯ P ¯ Q ¯ S + ¯ P Q S + P Q S + P ¯ Q ¯ S Go to Discussion MCA NIMCET Previous Year PYQ MCA NIMCET NIMCET 2023 PYQ
Solution Qus : 36 MCA NIMCET PYQ 2023 3
Suppose we have a 10-bit computer that uses 10-bit int (2's complement representation). the number representation of - 35 is
1 0000100011 2 1100100011 3 1111011101 4 1111011111 Go to Discussion MCA NIMCET Previous Year PYQ MCA NIMCET NIMCET 2023 PYQ Solution
10-bit 2's Complement Representation of –35
Format: 10-bit signed integer using 2's complement representation.
Step-by-Step:
First, convert 35 to 10-bit binary: 0000100011
Find 1's complement: 1111011100
Add 1 (to get 2's complement): 1111011101
✅ Final Answer:
1111011101
–35 in 10-bit 2's complement: 1111011101
Qus : 38 MCA NIMCET PYQ 2023 1
A bulb in the staircase has two switches, one switch is at the ground floor and the other one is at the first floor. The bulb can be turned ON and also can be turned OFF by any of the switches irrespective of the state of the other switch. The logic of the switching of the bulb resembles
1
XOR Gate
2
XNOR Gate
3
AND Gate
4
OR Gate
Go to Discussion MCA NIMCET Previous Year PYQ MCA NIMCET NIMCET 2023 PYQ Solution
Staircase Bulb Switch Logic
Question:
A staircase bulb is controlled by two switches — one at each floor. Each switch can independently turn the bulb ON or OFF, regardless of the other switch's position. What logic gate does this resemble?
✅ Correct Answer:
Exclusive OR (XOR) Gate
Explanation:
In XOR logic, the output is ON (1) when inputs are different, and OFF (0) when inputs are the same. Similarly, the bulb glows when the switches are in different states and turns OFF when both are in the same state.
Logic Used: XOR Gate
Qus : 39 MCA NIMCET PYQ 2023 4
Suppose we have a 10-bit computer that uses 10-bit floating point computational unit (Float number uses IEEE floating-point arithmetic where a floating point number has 1 sign bit, 5 exponent bits, and 4 fraction bits). The representation for +∞ (plus infinity) is
1 0 11111 1111 2 1 11111 0000 3 0 00000 1111 4 0 11111 0000 Go to Discussion MCA NIMCET Previous Year PYQ MCA NIMCET NIMCET 2023 PYQ Solution
10-bit Floating Point: +∞ Representation
Format: The 10-bit floating point is structured as follows:
1 bit for sign (S)
5 bits for exponent (E)
4 bits for fraction/mantissa (F)
IEEE Rule for +∞:
In IEEE floating-point format, +∞ is represented as:
Sign bit (S): 0
Exponent bits (E): all 1s → 11111
Fraction bits (F): all 0s → 0000
✅ Final 10-bit Representation: 0111110000
Qus : 41 MCA NIMCET PYQ 2023 2
What is the name of the storage device that compensates the difference in rates of flow of data from one device to another?
1
Concentrator
2
Buffer
3
Cache
4
Cache
Go to Discussion MCA NIMCET Previous Year PYQ MCA NIMCET NIMCET 2023 PYQ Solution
Data Flow Management
Question:
What is the name of the storage device that compensates the difference in rates of flow of data from one device to another?
✅ Correct Answer:
Buffer
Explanation:
A Buffer is a temporary storage area that helps in matching the speed of data transfer between a fast and a slow device, ensuring smooth data flow without loss.
Final Answer: Buffer
Qus : 43 MCA NIMCET PYQ 2023 4
A CPU generates 32-bit virtual addresses. The page size is 4 KB. The processor has a translation look-aside buffer (TLB) which can hold a total of 128 page table entries and is 4 -way set associative. The minimum size of the TLB tag is:
1 20 bits 2 11 bits 3 13 bits 4 15 bits Go to Discussion MCA NIMCET Previous Year PYQ MCA NIMCET NIMCET 2023 PYQ Solution
✅ Given Information:
The CPU generates 32-bit virtual addresses with a 4 KB page size . The TLB holds 128 page table entries and is 4-way set associative .
✅ Step 1: Virtual Address Breakdown:
We split the 32-bit virtual address into:
Page Offset: 12 bits (because 4 KB = 212 )
Page Number: 20 bits (32 - 12)
✅ Step 2: TLB Breakdown:
The TLB has 128 entries, and with 4-way set associativity, there are:
128 / 4 = 32 sets , so we need 5 bits for the index.
✅ Step 3: Tag Calculation:
The total number of bits for the virtual address is 32:
Page Offset: 12 bits
Index: 5 bits (because we have 32 sets)
Tag: Remaining bits = 32 - 12 - 5 = 15 bits
✅ Final Answer:
The minimum size of the TLB tag is: 15 bits
Qus : 44 MCA NIMCET PYQ 2023 3 The number of minterms in a n variable truth tableis
1 n 2 2 n − 1 2 3 2 n 4 2 n − 1 Go to Discussion MCA NIMCET Previous Year PYQ MCA NIMCET NIMCET 2023 PYQ Solution
✅ Number of Minterms in a n-variable Truth Table:
For n Boolean variables, the number of possible combinations of inputs is:
2n
Each combination corresponds to one minterm. Therefore, the total number of minterms in the truth table is also 2n .
✅ Final Answer:
The number of minterms in a n-variable truth table is: 2n
Qus : 46 MCA NIMCET PYQ 2023 3
Which of the following registers is used to keep track of address of the memory location where the next instruction is located?
1
Memory Data Register
2
Memory Address Register
3
Program Counter
4
Instruction counters
Go to Discussion MCA NIMCET Previous Year PYQ MCA NIMCET NIMCET 2023 PYQ Solution
Register Responsible for Next Instruction
Question:
Which of the following registers is used to keep track of the address of the memory location where the next instruction is located?
✅ Correct Answer:
Program Counter (PC)
Explanation:
The Program Counter (PC) holds the address of the next instruction to be fetched from memory and executed by the CPU. After fetching the current instruction, it automatically updates to point to the next one.
Final Answer: Program Counter
Qus : 47 MCA NIMCET PYQ 2023 4
The time required for fetching and execution of one machine instruction is:
1
Seek time
2
Real time
3
Delay time
4
CPU cycle
Go to Discussion MCA NIMCET Previous Year PYQ MCA NIMCET NIMCET 2023 PYQ Solution
Time for Fetch & Execute
Definition:
The time required to fetch and execute one machine instruction is called a
Machine Cycle / CPU Cycle .
Includes:
Instruction fetch
Instruction decode
Operand fetch (if any)
Execution
Result store (if any)
✅ Final Answer: Machine Cycle / CPU Cycle.
Qus : 63 MCA NIMCET PYQ 2024 1 Which of the following interfaces
perform the transfer of data between the memory and the I/O peripheral without
involving the CPU?
1 DMA 2 Serial Interface 3 branch
interface 4 DDA Go to Discussion MCA NIMCET Previous Year PYQ MCA NIMCET NIMCET 2024 PYQ Solution
Data Transfer Interface in Computer Systems
Question: Which interface transfers data between memory and I/O peripheral without CPU involvement ?
✅ Correct Answer: Direct Memory Access (DMA)
Why DMA?
The CPU only initiates the process.
The DMA controller directly transfers data between I/O and memory.
Frees the CPU for other tasks, improving efficiency.
❌ Incorrect Options (if any): Programmed I/O, Interrupt-driven I/O – both require CPU involvement.
Qus : 64 MCA NIMCET PYQ 2024 3 Cache memory functions as an
intermediary between
1 CPU
and Hard Disk 2 None
of these 3 CPU
and RAM 4 RAM
and ROM Go to Discussion MCA NIMCET Previous Year PYQ MCA NIMCET NIMCET 2024 PYQ Solution
Computer Architecture: Role of Cache Memory
Question: Cache memory functions as an intermediary between?
✅ Correct Answer: CPU and Main Memory (RAM)
Explanation:
CPU is very fast, but RAM is slower in comparison.
Cache memory holds frequently accessed data closer to the CPU.
This reduces data access time and improves overall system performance.
Hierarchy: CPU ↔ Cache ↔ Main Memory (RAM) ↔ Secondary Storage
Qus : 65 MCA NIMCET PYQ 2024 4 A CPU generates 32 bits virtual
addresses. The page size is 4 KB. The processor has a translation look-aside
buffer (TLB) which can hold a total of 128-page table entries and is 4- way set
associate. The minimum size of the TLB tag is
1 11 bits 2 20 bits 3 13 bits 4 15 bits Go to Discussion MCA NIMCET Previous Year PYQ MCA NIMCET NIMCET 2024 PYQ Solution
TLB Tag Size Calculation
Given:
Virtual Address = 32 bits
Page Size = 4 KB = 2 12 → Offset = 12 bits
VPN = 32 − 12 = 20 bits
TLB entries = 128, 4-way set associative → 32 sets
Set index bits: log 2 ( 32 ) = 5 bits
TLB Tag = VPN − Set Index = 20 − 5 = 15 bits
✅ Final Answer: 15 bits
Qus : 66 MCA NIMCET PYQ 2024 2 The expression P+QR is the reduced
form of _____
1 (P
+ R)Q 2 (P+Q)
(P+R) 3 PQ
+ QR 4 (P+Q)
R Go to Discussion MCA NIMCET Previous Year PYQ MCA NIMCET NIMCET 2024 PYQ Solution
Boolean Simplification
Given Expression: P + QR
We ask: This is the simplified (reduced) form of which expression?
Try expanding: (P + Q)(P + R)
Using distributive law:
(P + Q)(P + R) = P(P + R) + Q(P + R) = P + PR + PQ + QR
= P + PQ + PR + QR = P + QR (since P absorbs PQ and PR)
✅ Final Answer: (P + Q)(P + R)
Qus : 67 MCA NIMCET PYQ 2024 1 The
primary purpose of cache memory in a computer system is
1 to temporarily store frequently accessed data and instruction for faster access by the CPU. 2 To permanently store data and programs 3 to provide additional storage space when the main memory is full. 4 to manage input and output operations between the CPU and peripherals. Go to Discussion MCA NIMCET Previous Year PYQ MCA NIMCET NIMCET 2024 PYQ Solution
Computer Architecture: Purpose of Cache Memory
Question: What is the primary purpose of cache memory in a computer system?
✅ Correct Answer: To increase the speed of data access by storing frequently used data closer to the CPU
Explanation:
Cache memory is much faster than main memory (RAM).
It holds frequently accessed data and instructions.
Helps reduce CPU waiting time and improves performance.
Hierarchy: CPU → Cache → RAM → Storage
Qus : 68 MCA NIMCET PYQ 2024 4 Consider the program below which uses
six temporary variables a, b, c, d, e, and f.
a = 10
b = 20
c = 30
d=a+c
f=c+c
b=c+e
e=b+f
d=5+e
return d+f
Assuming that all the above operations take their operands from registers, the minimum number of registers needed to execute this program without spilling is
Assuming that all the above operations
take their operands from registers, the minimum number of registers needed to execute
this program without spilling is
1 6 2 4 3 5 4 3 Go to Discussion MCA NIMCET Previous Year PYQ MCA NIMCET NIMCET 2024 PYQ Solution
Detailed Register Allocation Analysis
Objective: Determine the minimum number of registers needed to execute the program without spilling.
Live Range Analysis:
a: Line 1 → 4
b: Line 6 → 7
c: Line 3 → 6
d: Line 8 → 9
e: Line 7 → 8
f: Line 5 → 9
Max live variables: 3 (after lines 6 and 7)
✅ Final Answer: 3 registers are required to execute the program without spilling.
Qus : 69 MCA NIMCET PYQ 2024 1 Which of the following is the smallest
unit of data in a computer ?
1 Bit 2 Byte 3 KB 4 Nibble Go to Discussion MCA NIMCET Previous Year PYQ MCA NIMCET NIMCET 2024 PYQ Solution
Basic Computer Knowledge: Smallest Unit of Data
Question: Which of the following is the smallest unit of data in a computer?
✅ Correct Answer: Bit (Binary Digit)
Explanation:
A bit is the most fundamental unit of data in computing.
It represents a binary value: 0
or 1
.
All other units (Byte, Kilobyte, etc.) are multiples of bits.
Common Units of Data:
1 Bit = Smallest unit
1 Byte = 8 Bits
1 Kilobyte (KB) = 1024 Bytes
1 Megabyte (MB) = 1024 KB
? Note: Every piece of data in a computer—from text and images to video and sound—ultimately breaks down into bits.
Qus : 70 MCA NIMCET PYQ 2024 1 Consider
the following 4- bit binary numbers represented in the 2’s complement form :
1101 and 0100 What would be the result when we add them?
1 0001
and no overflow 2 1001
and an overflow 3 0001
and an overflow 4 1001
and no overflow Go to Discussion MCA NIMCET Previous Year PYQ MCA NIMCET NIMCET 2024 PYQ Solution
2's Complement Addition (4-bit)
Given: 1101 and 0100 (in 2’s complement)
Step-by-step:
1101 = −3 (in decimal)
0100 = +4 (in decimal)
Sum = −3 + 4 = +1
+1 in 4-bit 2’s complement = 0001
✅ Final Answer: 0001
Qus : 71 MCA NIMCET PYQ 2024 2 A
computer system has 16-bit wide address/ data bus that uses RAM chips of 4K × 8-bit capacity. The number of RAM chips are needed to provide a memory capacity
of 64 Kbytes memory is
1 32 2 16 3 64 4 8 Go to Discussion MCA NIMCET Previous Year PYQ MCA NIMCET NIMCET 2024 PYQ Solution
Memory Chip Calculation
Given:
RAM chip size = 4K × 8-bit = 4096 bytes = 4 KB
Required memory = 64 KB = 65536 bytes
Calculation:
Total chips needed = 65536 / 4096 = 16 chips
✅ Final Answer: 16 RAM chips are needed to build 64 KB of memory.
Qus : 72 MCA NIMCET PYQ 2024 3 Given
that numbers A and B are two 8 bit 2’s complement numbers with A = 11111111,
B = 11111111. Then sum A + B is _________
1 00000010
2 11111100 3 11111110
4 00000000 Go to Discussion MCA NIMCET Previous Year PYQ MCA NIMCET NIMCET 2024 PYQ Solution
2's Complement Addition (8-bit)
Given:
A = 11111111 → (−1)
B = 11111111 → (−1)
Sum: −1 + (−1) = −2
Convert −2 to 8-bit 2's complement:
+2 = 00000010
Invert = 11111101
Add 1 = 11111110
✅ Final Answer: 11111110
Qus : 74 MCA NIMCET PYQ 2024 3 Consider
an arbitrary number system with independent digits as 0,1 and A. If we generate
first few numbers in sequence as 00, 01, 0A, 10, 11, 1A and if this process is
continued to generate the numbers, then the position of 10A is ________
1 15 2 10 3 12 4 9 Go to Discussion MCA NIMCET Previous Year PYQ MCA NIMCET NIMCET 2024 PYQ Solution
Custom Number System: Position of 10A
Given digits: 0, 1, A (base-3)
Convert 10A to base-10:
1 → 1
0 → 0
A → 2
10A = 1×9 + 0×3 + 2 = 11
List of numbers in sequence:
00
01
0A
10
11
1A
A0
A1
AA
100
101
10A
✅ Final Answer: 12
Qus : 75 MCA NIMCET PYQ 2024 2 Which
of the following components is not a part of an instruction formation in CPU
processing?
1 Opcode
2 Register
file 3 Source
operand 4 Destination
operand Go to Discussion MCA NIMCET Previous Year PYQ MCA NIMCET NIMCET 2024 PYQ Solution
Instruction Formation in CPU Processing
Question: Which of the following is not a part of instruction formation?
Options:
Opcode
Register file
Source operand
Destination operand
✅ Correct Answer: Register File
Explanation:
Opcode, Source operand, Destination operand — all are part of the instruction format.
Register File — a hardware structure that stores registers, but it is not encoded into the instruction.
Qus : 76 MCA NIMCET PYQ 2024 3 The
range of the exponent E in the IEEE754 double precision (Binary 64) format is
_____
1 − 1023 ≤ E ≤ 1022 2 − 1022 ≤ E ≤ 1022 3 − 1022 ≤ E ≤ 1023 4 − 1023 ≤ E ≤ 1023 Go to Discussion MCA NIMCET Previous Year PYQ MCA NIMCET NIMCET 2024 PYQ Solution
✅ IEEE 754 Double Precision Format:
The **exponent** field in the IEEE 754 double precision (Binary 64) format is 11 bits long and uses a **bias of 1023**.
✅ Step-by-Step Explanation:
The exponent field has **11 bits**, which means it can represent values between **0 and 2047**.
The exponent is stored in **biased form**: the stored value is the actual exponent + 1023.
For **normalized numbers**, the exponent range is:
Minimum exponent: 1 − 1023 = − 1022
Maximum exponent: 2046 − 1023 = + 1023
Special cases:
**Exponent = 0**: Used for **denormalized numbers**.
**Exponent = 2047**: Represents **infinity** or **NaN** (Not a Number).
✅ Final Answer:
The range of the exponent E in the IEEE 754 double precision (Binary 64) format is:
From -1022 to +1023 (for normalized numbers)
Qus : 79 MCA NIMCET PYQ 2024 2 Let
the given number 11001, 1001 and 111001 be correspond to the 2’s complement representation.
Then with which one of the following decimal number, the given numbers match
1 -6,
-6 and -6, respectively 2 -7,
-7 and -7 respectively 3 -25,
-9 and -57 respectively 4 25,
9 and 57, respectively Go to Discussion MCA NIMCET Previous Year PYQ MCA NIMCET NIMCET 2024 PYQ Solution
Binary to Decimal: 2's Complement Conversion
Given binary numbers:
11001 (5-bit)
1001 (4-bit)
111001 (6-bit)
Step-by-step (2's complement):
Each starts with 1 → negative number
Convert by inverting and adding 1
All result in binary 0111 → decimal 7
So final value = −7
✅ Final Answer: Each binary number corresponds to the decimal number −7 .
Qus : 84 MCA NIMCET PYQ 2022 2 If a processor clock is rated as 2500 million cycles per second, then its clock period is:
1 2.50 × 10 − 10 s e c 2 4.0 × 10 − 10 s e c 3 1.00 × 10 − 10 s e c 4 None of the above Go to Discussion MCA NIMCET Previous Year PYQ MCA NIMCET NIMCET 2022 PYQ Solution we know that Frequency is defined as the number of cycles in one second
Number of cycle in 1 sec = 2500 million
=> Frequency = 2500 Mhz
we know that time period is the inverse of frequency and is defined as the time taken by one cycle.
T = 1 F
T = 1 2500 × 10 − 6
T = 4 × 10 − 10 sec
Qus : 86 MCA NIMCET PYQ 2022 2 FFFF will be the last memory location in a memory of size
1 1k 2 64k 3 32k 4 16k Go to Discussion MCA NIMCET Previous Year PYQ MCA NIMCET NIMCET 2022 PYQ Solution
✅ Finding the Memory Size:
The last memory location "FFFF" is a hexadecimal number.
Each hexadecimal digit represents 4 bits, so:
"FFFF" is a 4-digit hexadecimal number, meaning it represents 16 bits or 2 bytes .
"FFFF" in decimal is equivalent to 65535 .
Therefore, the total memory size is 65536 bytes or 64 KB .
✅ Final Answer:
The memory size is: 64 KB
Qus : 93 MCA NIMCET PYQ 2016 1 Consider a hard disk with 16 recording surfaces (0 – 15) having 16384 cylinders (0 – 16383) and each cylinder contains 64 sectors (0 – 63). Data storage capacity in each sector is 512 bytes. Data are organized stored in the disk and the starting disk location of the file is < 1200, 9, 40>. What is the cylinder number of the last sector of the file, if it is stored in a contiguous manner?
1 1284 2 1282 3 1286 4 1288 Go to Discussion MCA NIMCET Previous Year PYQ MCA NIMCET NIMCET 2016 PYQ
Solution Qus : 94 MCA NIMCET PYQ 2016 2 Consider the following min term expression for F.
F(P,Q,R,S) = ∑ (0, 2, 5, 7, 8, 10, 13, 15)
The minterms 2, 7, 8 and 13 are ‘do not care' terms.
The minimal sum of products form for F is
1 2 3 4 Go to Discussion MCA NIMCET Previous Year PYQ MCA NIMCET NIMCET 2016 PYQ
Solution [{"qus_id":"4189","year":"2019"},{"qus_id":"4190","year":"2019"},{"qus_id":"4191","year":"2019"},{"qus_id":"4192","year":"2019"},{"qus_id":"4193","year":"2019"},{"qus_id":"4195","year":"2019"},{"qus_id":"4196","year":"2019"},{"qus_id":"4197","year":"2019"},{"qus_id":"4198","year":"2019"},{"qus_id":"4194","year":"2019"},{"qus_id":"4376","year":"2017"},{"qus_id":"4377","year":"2017"},{"qus_id":"4378","year":"2017"},{"qus_id":"4379","year":"2017"},{"qus_id":"4380","year":"2017"},{"qus_id":"4381","year":"2017"},{"qus_id":"4382","year":"2017"},{"qus_id":"4383","year":"2017"},{"qus_id":"4384","year":"2017"},{"qus_id":"4385","year":"2017"},{"qus_id":"9519","year":"2020"},{"qus_id":"9520","year":"2020"},{"qus_id":"9521","year":"2020"},{"qus_id":"9522","year":"2020"},{"qus_id":"9523","year":"2020"},{"qus_id":"9524","year":"2020"},{"qus_id":"9525","year":"2020"},{"qus_id":"9526","year":"2020"},{"qus_id":"9527","year":"2020"},{"qus_id":"9528","year":"2020"},{"qus_id":"10752","year":"2021"},{"qus_id":"10753","year":"2021"},{"qus_id":"10754","year":"2021"},{"qus_id":"10755","year":"2021"},{"qus_id":"10756","year":"2021"},{"qus_id":"10757","year":"2021"},{"qus_id":"10758","year":"2021"},{"qus_id":"10759","year":"2021"},{"qus_id":"10760","year":"2021"},{"qus_id":"10761","year":"2021"},{"qus_id":"11199","year":"2022"},{"qus_id":"11200","year":"2022"},{"qus_id":"11201","year":"2022"},{"qus_id":"11202","year":"2022"},{"qus_id":"11203","year":"2022"},{"qus_id":"11204","year":"2022"},{"qus_id":"11205","year":"2022"},{"qus_id":"11206","year":"2022"},{"qus_id":"11207","year":"2022"},{"qus_id":"11208","year":"2022"},{"qus_id":"11591","year":"2023"},{"qus_id":"11592","year":"2023"},{"qus_id":"11593","year":"2023"},{"qus_id":"11594","year":"2023"},{"qus_id":"11595","year":"2023"},{"qus_id":"11596","year":"2023"},{"qus_id":"11597","year":"2023"},{"qus_id":"11598","year":"2023"},{"qus_id":"11599","year":"2023"},{"qus_id":"11600","year":"2023"},{"qus_id":"11601","year":"2023"},{"qus_id":"11602","year":"2023"},{"qus_id":"11603","year":"2023"},{"qus_id":"11604","year":"2023"},{"qus_id":"11605","year":"2023"},{"qus_id":"11606","year":"2023"},{"qus_id":"11607","year":"2023"},{"qus_id":"11608","year":"2023"},{"qus_id":"11609","year":"2023"},{"qus_id":"11610","year":"2023"},{"qus_id":"4583","year":"2016"},{"qus_id":"4584","year":"2016"},{"qus_id":"4586","year":"2016"},{"qus_id":"4587","year":"2016"},{"qus_id":"4588","year":"2016"},{"qus_id":"4589","year":"2016"},{"qus_id":"4590","year":"2016"},{"qus_id":"4591","year":"2016"},{"qus_id":"4592","year":"2016"},{"qus_id":"4585","year":"2016"},{"qus_id":"11909","year":"2024"},{"qus_id":"11910","year":"2024"},{"qus_id":"11911","year":"2024"},{"qus_id":"11912","year":"2024"},{"qus_id":"11913","year":"2024"},{"qus_id":"11914","year":"2024"},{"qus_id":"11915","year":"2024"},{"qus_id":"11916","year":"2024"},{"qus_id":"11917","year":"2024"},{"qus_id":"11918","year":"2024"},{"qus_id":"11928","year":"2024"},{"qus_id":"11925","year":"2024"},{"qus_id":"11924","year":"2024"},{"qus_id":"11923","year":"2024"},{"qus_id":"11922","year":"2024"},{"qus_id":"11921","year":"2024"},{"qus_id":"11920","year":"2024"},{"qus_id":"11919","year":"2024"},{"qus_id":"11927","year":"2024"}]